Method for Computationally Efficient Assessment of Hosting Capacity in Real Distribution Feeders

Authors

  • José C. G. Andrade ERA Energy Research and Analytics, Campinas-SP, Brazil
  • Ricardo Torquato ERA Energy Research and Analytics, Campinas-SP, Brazil
  • Tiago R. Ricciardi ERA Energy Research and Analytics, Campinas-SP, Brazil
  • Bruno P. Cancian School of Electrical and Computer Engineering, University of Campinas (UNICAMP), Campinas-SP, Brazil
  • Walmir Freitas School of Electrical and Computer Engineering, University of Campinas (UNICAMP), Campinas-SP, Brazil
  • Heliton O. Vilibor Department of Engineering Standards, CPFL Energia, Campinas-SP, Brazil
  • Ricardo F. Buzo Department of Engineering Standards, CPFL Energia, Campinas-SP, Brazil

Keywords:

Binary search, circuit reduction, distributed generation, distribution systems, hosting capacity

Abstract

Efficient hosting capacity (HC) analysis for distributed generation (DG) is a major concern to distribution utilities due to the overwhelming number of connection requests. HC assessment is especially critical for medium-voltage (MV) feeders, as Brazilian utilities perform deterministic case-by-case analyses of all connection requests. In this paper, a timesaving HC calculation methodology that leverages two key strategies is proposed. First, a binary search method is applied to expedite the evaluation by testing fewer scenarios. Second, a circuit reduction method is introduced to select specific buses for HC calculation. Application of these techniques to 437 real Brazilian feeders shows that circuit reduction leads to a negligible error in 95% of the cases while achieving a timesaving of approximately 65%. The binary search reduces the assessment time by 75-88%. When combined, these methods offer a significant speedup in HC analysis, enabling daily updates of HC values for the entire distribution utility area.

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Published

2024-10-18

Issue

Vol. 4 No. 1 (2024): CBA2024

Section

Articles